| Status | Title | Difficulty | Tags |
|---|---|---|---|
Implement a 4x4 matrix memory module that supports both read and write operations. The matrix should store 8-bit values and allow access via row and column selectors.
clk: Clock signalreset: Reset signal (active high)row_sel: 2-bit row selectorcol_sel: 2-bit column selectorwr_en: Write enable signaldin: 8-bit data inputdout: 8-bit data outputSubmit your Verilog code using Cmd+Enter to see the simulation results and waveform visualization.